A network switch of a data communications network provides a "switching" function for transferring information among entities of the network. Typically, the switch is a computer comprising a collection of ports interconnected by a switching fabric circuit. Each port couples the switch to a network entity over any of various types of media, including point-to-point serial line, Ethernet, FDDI or token ring connections. A network entity may consist of any device that "sources" (i.e., transmits) or "sinks" (i.e., receives) information over such media.
The switching function provided by the switch typically comprises receiving information at an input port from a network entity, forwarding that information to at least one other output port and, thereafter, transmitting the information over at least one medium to another entity of the network. In the case of an asynchronous transfer mode (ATM) switch, the information is forwarded among the ports as a plurality of fixed-length data elements, or cells. Each cell is 53 bytes in length and consists of a 5-byte header field appended to a 48-byte data ("payload") field. The header field contains routing and other address information, e.g., virtual path (VP) and virtual circuit (VC) connection information, for the cell that is translated prior to transmission over the network.
Often, the destination of a cell may be more than one output port of the switch; this type of data transfer may involve a broadcast or multicast data connection. Point-to-multipoint connections generally degrade the performance of a switch because of the overhead needed to effect the translation and forwarding decisions for the cell. These decisions are typically rendered by the switching fabric circuit; examples of such fabrics include a shared-memory switching fabric, a shared-medium, output-buffered switching fabric based on, e.g., a time division multiplexing bus, and a crossbar, input-buffered switching fabric.
The bus-based switching fabric circuit is a multipoint data path that is shared among the ports. This architecture facilitates replication of an ATM cell because those ports destined to receive the cell merely copy its contents from the bus with essentially no replication latency. However, each copy of the cell is physically stored in an output buffer memory of the port, thereby necessitating a significant amount of total buffer capacity in order to effectively implement the multicasting capability.
The shared-memory architecture provides a generally higher buffer efficiency than other switching fabrics because of statistical buffer sharing, while achieving the optimal delay-throughput performance of bus-based switching for unicast (point-to-point) connection traffic. Yet, implemention of multicast functionality generally suffers from potentially slower multicast replication rates. The invention is directed to a mechanism for increasing the replication rate of a switching fabric circuit having a multicasting capability that requires minimal buffer capacity for multicast connection traffic.